There is currently an increasing demand for disposable, inexpensive, flexible, passive memory device-containing tags and labels in which information is stored, for example as anti-counterfeiting tags in packaging. Production of such non-volatile memory elements, including writing of the information, should be easy and inexpensive and preferably should be capable of being incorporated in the tag, label and package printing process or in the packaging process itself and should consist of uncomplicated and inexpensive materials and involve a minimum of processing steps. For use in packages, it is important that the memory device is relatively robust and fairly insensitive to mechanical shock, temperature changes and other environmental influences.
Conventional silicon-based semiconductor memories have the disadvantage of requiring expensive and complex processing, the high process temperatures and the non-flexibility making them unsuitable for use on packaging substrates. Moreover, silicon-based semiconductor memories pose considerable environmental issues upon disposal. U.S. Pat. No. 6,542,397 discloses an apparatus comprising: at least one designated memory cell of a plurality of memory cells, each designated memory cell having a resistance-altering constituent disposed therein, but only exemplifies silicon-based read-only resistor memories. U.S. Pat. No. 6,649,499 discloses a method of making a memory comprising: diffusing of a resistance-altering constituent into a plurality of memory cells, the plurality of memory cells comprising polycrystalline silicon and the resistance-altering constituent comprising at least one Group IA element; and moving at least a portion of an implanted dose of the resistance-altering constituent from the conductive layer of at least one memory cell. In these resistor memories, information is stored by alteration of the resistance at pre-selected crossing points. Crosstalk between adjacent word lines are reduced if the resistance in each memory cell is significantly higher than the resistance of the bit lines and word lines. However, this does not prevent the existence of alternative current paths.
U.S. Pat. No. 6,107,666 discloses a high density ROM device, comprising: a substrate; and at least one memory array, including: a first insulating layer located over a surface of the substrate, plural bit lines located over the first insulating layer and extending in a first direction, said bit lines being spaced from one another at essentially equal intervals; a second insulating layer formed over the plural bit lines, at least one via formed in the second insulating layer and exposing a portion of the bit lines, and plural word lines located over the second insulating layer and extending in a second direction that crosses the first direction to form an angle, said word lines being spaced from one another at essentially equal intervals; and wherein some of the word lines are connected to the bit lines using the via and some of the word lines are isolated from the bit lines using the second insulating layer. U.S. Pat. No. 6,107,666 discloses a read only memory device which is not based on silicon, but in which metal bit lines and word lines are present. Electrical interconnects are made by the application of a metal in pre-selected vias present between the bit lines and word lines.
However, the production processes for the resistor memory cells disclosed in U.S. Pat. No. 6,107,666, U.S. Pat. No. 6,542,397 and U.S. Pat. No. 6,649,499 all rely on evaporation and etching methods to apply the metal or silicon structures, requiring high temperatures in the range of 300° C. to 400° C., which results in melting or severe degradation of polymer-based or paper-based substrates, hence making it unsuitable for packaging. Therefore such metal or silicon structures neither lend themselves to incorporation into tag, label and package printing process or into the packaging process nor do they lend themselves to environmentally friendly disposal.
Information can be stored electrically in a WORM memory by using the anti-fuse principle. U.S. Pat. No. 6,656,763, for example, discloses a method of making an organic memory cell comprising: providing a first electrode; forming a passive layer comprising a conductivity facilitating compound over the first electrode; forming an organic semiconductor layer over the passive layer using a spin-on technique, the spin-on technique comprising applying a mixture of i) at least one of a conjugated organic polymer, a conjugated organometallic compound, a conjugated organometallic polymer, a buckyball, and a carbon nanotube and ii) at least one solvent selected from the group consisting of glycol ether esters, glycol ethers, furans, and alkyl alcohols containing from about 4 to about 7 carbon atoms; and providing a second electrode over the organic semiconductor layer.
Furthermore, US 2004/0149,552A1 discloses an electronic switch comprising: a first conductor; a second conductor; and a conductive organic polymer layer in contact with, and lying between, the first conductor and the second conductor, the conductive organic polymer layer in one of a first state in which the organic polymer layer conducts current between the first conductor and the second conductor with relatively high conductivity, and a second state, in which the organic polymer layer conducts current between the first conductor and the second conductor with relatively lower conductivity. The resistance of a semiconductor layer present between word lines and bit lines can be electrically altered by applying a ‘high’ voltage pulse, thereby increasing the resistance. To prevent alternative current paths it is necessary to include additional layers between the word lines and bit lines in each memory cell to form diodes, hereby making the manufacturing process more complicated.
The printing of memories has been proposed in the art for several different types of devices. US 2003/0230,746A1 discloses a memory device comprising: a first semiconducting polymer film having a first side and a second side, wherein said first semiconducting polymer film includes an organic dopant; a first plurality of electrical conductors substantially parallel to each other coupled to said first side of said first semiconducting polymer layer; and a second plurality of electrical conductors substantially parallel to each other, coupled to said second side of said first semiconducting polymer layer and substantially mutually orthogonal to said first plurality of electrical conductors, wherein an electrical charge is localized on said organic dopant. The structures of the doped semiconducting film, layered between two conducting line patterns are simple. However, these memories are volatile, and the information is lost if no power is applied. US 2001/039124A1 discloses a method for manufacturing a memory device which stores a state in accordance with the presence or the absence of a covering insulating film on a surface of an electrode at a memory cell position, the method comprising: selectively ejecting the insulating material using an inkjet head to the surface of the electrode at a predetermined memory cell position so as to cover the surface of the electrode at the predetermined memory cell position with the insulating material.
WO 02/0029706A1 discloses an electronic bar code comprising: a bar code circuit that stores a code that is electronically readable, wherein the code is defined by a polymer printing process; and an interface coupled to the bar code circuit to allow a bar code reader to access the code stored in the bar code circuit. However, the printed electronic circuit does not consist of a passive matrix but a number of electronic components of which the presence or absence of the component or its connection determines the stored information.
U.S. Pat. No. 5,464,989 discloses a mask ROM having a plurality of memory cells, comprising: a semiconductor substrate having a main surface; a plurality of parallel first signal lines extending in a column direction on said main surface of said semiconductor substrate, a plurality of parallel second signal lines extending in a row direction on said main surface of said semiconductor substrate, crossing said plurality of first signal lines at a plurality of crossovers each forming a respective memory cell of said plurality of memory cells; an insulation film formed between said plurality of first signal lines and said plurality of second signal lines; and selecting means for selecting one of said plurality of first signal lines and one of said plurality of second signal lines and causing electric field between the selected first signal line and the selected second signal line by applying potential difference between the selected first signal line and the selected second signal line, said insulation film having, at each of said plurality of crossovers for storing data, one of i) a first thickness necessary for keeping an insulating state between the selected first signal line and the selected second signal line even if an electric field is received between the first signal line selected by the selecting means and the second signal line selected by the selecting means, ii) a second thickness for causing a first tunnel current to flow between the selected first signal line and the selected second signal line when the electric field is received between the first signal line and the second signal line selected by the selecting means, and iii) a third thickness for causing a second tunnel current to flow between the selected first signal line and the selected second signal line when the electric field is received between the first signal line and the second signal line selected by the selecting means. The production of a passive matrix ROM is thereby disclosed in U.S. Pat. No. 5,464,989 based on conductive electrodes, separated by an isolating oxide film in which a tunnel phenomenon is generated with storage of multiple bit levels in one memory cell. Variations in the oxide layer thickness leads to different tunnel currents through the layer, which encode for multiple levels in the information in each cell.
WO 02/079316A discloses an aqueous composition containing a polymer or copolymer of a 3,4-dialkoxythiophene in which the two alkoxy groups may be the same or different or together represent an optionally substituted oxy-alkylene-oxy bridge, a polyanion and a non-Newtonian binder; a method for preparing a conductive layer comprising: applying the above-described aqueous composition to an optionally subbed support, a dielectric layer, a phosphor layer or an optionally transparent conductive coating; and drying the thereby applied aqueous composition; antistatic and electroconductive coatings prepared according to the above-described method for preparing a conductive layer; a printing ink or paste comprising the above-described aqueous composition; and a printing process comprising: providing the above-described printing ink; printing the printing ink on an optionally subbed support, a dielectric layer, a phosphor layer or an optionally transparent conductive coating. However, WO 02/079316A only discloses the application of such inks for applying antistatic or electroconductive layers to an optionally subbed support, a dielectric layer, a phosphor layer or an optionally transparent conductive layer, which may be a step in the production of electroluminescent devices which can be used in lamps, displays, back-lights e.g. LCD, automobile dashboard and keyswitch backlighting, emergency lighting, cellular phones, personal digital assistants, home electronics, indicator lamps and other applications in which light emission is required.
WO 03/000765A discloses a non-dye containing flexographic ink containing a polymer or copolymer of a 3,4-dialkoxythiophene in which the two alkoxy groups may be the same or different or together represent an optionally substituted oxy-alkylene-oxy bridge, a polyanion and a latex binder in a solvent or aqueous medium, characterized in that the polymer or copolymer of a 3,4-dialkoxythiophene is present in a concentration of at least 0.1% by weight in the ink and that the ink is capable of producing a colorimetrically additive transparent print; a method of preparing the flexographic ink; and a flexographic printing process therewith. However, WO 03/000765A only indicates the application of such inks for applying antistatic and electroconductive patterns to an optionally subbed support, a dielectric layer, a phosphor layer and a transparent conductive layer, which may be a step in the production of electrical circuitry for single and limited use items such as toys, in capacitive antennae as part of radiofrequency tags, in electroluminescent devices which can be used in lamps, displays, back-lights e.g. LCD, automobile dashboard and keyswitch back-lighting, emergency lighting, cellular phones, personal digital assistants, home electronics, indicator lamps and other applications in which light emission is required.
There is therefore a need for an easy and inexpensive means of storing information which can be easily incorporated in a tag, label or package printing process or the packaging process itself. Moreover, such easy and inexpensive means of storing information must be capable of lending itself to environmentally friendly disposal.